end of test meaning in Chinese
试验的结果
试验结果
Examples
- According to the function of test platform , the test platform is partition into a few modules . those modules are designed with verilog hdl and the key problems are discussed in details . the verilog codes for transmit and receive end of test platform are simulated under quartus ii 5 . 0 ise , and debugged by downloading the verilog programs into ep1s25f780c and ep1s80b956c6 developing kits
在对每一个模块的设计要点做了详细说明之后,采用verilog语言编写各模块逻辑代码,在altera公司的quartusii5 . 0集成开发环境下,基于altera公司stratix系列fpga对各模块及整个窄带ldpc解码-误码测试平台进行了仿真并将发端和收端的verilog程序分别下载到altera的ep1s25f780c和ep1s80b956c6开发实验板进行调试。